In nonvolatile memory cells that retain electric charges to store data in their charge storage layers, repetitive rewriting sometimes causes “a charge loss phenomenon” in which the retained electric charge decreases. The nonvolatile semiconductor storage device disclosed in International Publication No. 2004-097839 Gazette is configured to store 2-bit data in every memory cell by retaining an electric charge in a trap layer made of a nitride film or the like. The trap layer made of a nitride film etc. is an insulating layer. As such, no movement of electric charges occurs therein, so that electric charges can be individually stored in both ends of the trap layer.
However, in the memory cells disclosed above, if the number of rewriting operations increases, the charge loss phenomenon, (i.e., a loss of written electric charge) will occur. To ensure a margin for reading data from memory cells even when the charge loss phenomenon occurs, the read operation is performed using a dynamic reference cell. This dynamic reference cell is a cell to which a bias stress is applied by a rewrite operation similarly to the memory cells.
The dynamic reference cell is comprised of a pair of cells of varying types. Of these cells, one is for data “1” and the other for data “0.” In the dynamic reference cell, the average of readout currents from these cells is obtained as a reference current. At the same time a program operation or erase operation is performed on a memory cell, the program operation or erase operation is also performed on the dynamic reference cell, during which a bias stress is also applied to. This causes a charge loss in the reference cell similar to the charge loss that occurs in the memory cell so that a read margin can be ensured.
Generally, a dynamic reference cell is shared among a plurality of memory cells and arranged in the same sector as the memory cells since the occupied area for the nonvolatile storage device is limited. However, this leads to an unfavorable situation that occurs when a target memory cell is programmed and its corresponding reference cell is also programmed to ensure a read margin, while the charge loss phenomenon occurs in other memory cells which share the reference cell with the target memory cell, so that the read margin of these memory cells with respect to the reference cell will be exhausted. Specifically, the charge loss occurs in the memory cells while the reference cell is being programmed, so that the “0” read margin degrades. To avoid this, a refresh operation needs to be performed on these memory cells in order for the memory cells to have the same charge level as a memory cell to be subsequently programmed. In the refresh operation, if the threshold value of the memory cells is lower than a reference voltage level for a normal write verify operation and higher than a reference voltage level for a read operation, a bias is applied in order to settle the charge loss situation, similar to what occurs during the program operation.
In the related art described above, even when a program operation is performed on some memory cells which share the dynamic reference cell, a refresh operation (aka “reprogramming operation”) has to be performed on all other memory cells which have already been programmed. This presents a problem as the program operation can take a lot of time.
As provided in the prior art, a bias application for the refresh operation of the memory cells in which charge loss has occurred and a bias application for the program operation of a new target memory cell are performed at the same time. However, in terms of the charge storing condition of the trap layer before the bias application, the memory cells which have lost electric charge but are in a programmed state are different from a memory cell that is still in an erased state prior to programming, Specifically, the former still retains electric charge, whereas the latter stores no electric charge. Therefore, if a bias is applied to these memory cells at the same time, the memory cells which are the targets of the refresh operation may be brought into an excessively programmed state. To solve this problem, the amount of electric charge injected per bias application is limited by setting a bias voltage to be applied to a value lower than the bias voltage of the normal program operation and/or limiting the increasing rate of the bias value of repeatedly performed bias applications to a small value. This, however, brings about an undesirable result in that the program operation performed simultaneously with the refresh operation can take a long time.